9744 invalidate cache before microcode update
Reviewed by: John Levon <john.levon@joyent.com>
Reviewed by: Andy Fiddaman <omnios@citrus-it.co.uk>
Reviewed by: Richard Lowe <richlowe@richlowe.net>
Approved by: Dan McDonald <danmcd@joyent.com>
diff --git a/usr/src/uts/i86pc/os/microcode.c b/usr/src/uts/i86pc/os/microcode.c
index e59bdb8..afc4895 100644
--- a/usr/src/uts/i86pc/os/microcode.c
+++ b/usr/src/uts/i86pc/os/microcode.c
@@ -24,6 +24,7 @@
* Use is subject to license terms.
*
* Copyright 2012 Nexenta Systems, Inc. All rights reserved.
+ * Copyright (c) 2018, Joyent, Inc.
*/
#include <sys/asm_linkage.h>
@@ -754,8 +755,15 @@
return (0);
}
- if (!on_trap(&otd, OT_DATA_ACCESS))
+ if (!on_trap(&otd, OT_DATA_ACCESS)) {
+ /*
+ * On some platforms a cache invalidation is required for the
+ * ucode update to be successful due to the parts of the
+ * processor that the microcode is updating.
+ */
+ invalidate_cache();
wrmsr(ucode->write_msr, (uintptr_t)uusp->ucodep);
+ }
no_trap();
#endif
@@ -849,6 +857,12 @@
uus.new_rev = uinfop->cui_rev;
#else
kpreempt_disable();
+ /*
+ * On some platforms a cache invalidation is required for the
+ * ucode update to be successful due to the parts of the
+ * processor that the microcode is updating.
+ */
+ invalidate_cache();
wrmsr(ucode->write_msr, (uintptr_t)ucodefp->uf_body);
ucode->read_rev(uinfop);
kpreempt_enable();