| /*- |
| * Copyright (c) 2014 Ganbold Tsagaankhuu <ganbold@freebsd.org> |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * 1. Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * 2. Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| * SUCH DAMAGE. |
| * |
| * $FreeBSD$ |
| */ |
| |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/pinctrl/sun4i-a10.h> |
| |
| / { |
| compatible = "allwinner,sun7i-a20"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| interrupt-parent = <&GIC>; |
| |
| aliases { |
| soc = &SOC; |
| }; |
| |
| timer { |
| compatible = "arm,armv7-timer"; |
| interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
| }; |
| |
| SOC: a20 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "simple-bus"; |
| ranges; |
| bus-frequency = <0>; |
| |
| GIC: interrupt-controller@01c81000 { |
| compatible = "arm,gic"; |
| reg = <0x01c81000 0x1000>, /* Distributor Registers */ |
| <0x01c82000 0x0100>, /* CPU Interface Registers */ |
| <0x01c84000 0x2000>, |
| <0x01c86000 0x2000>; |
| interrupt-controller; |
| #interrupt-cells = <3>; |
| interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
| }; |
| |
| sramc@01c00000 { |
| compatible = "allwinner,sun4i-sramc"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = < 0x01c00000 0x1000 >; |
| }; |
| |
| cpu-cfg@01c25c00 { |
| compatible = "allwinner,sun7i-cpu-cfg"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = < 0x01c25c00 0x400 >; |
| }; |
| |
| ccm@01c20000 { |
| compatible = "allwinner,sun4i-ccm"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = < 0x01c20000 0x400 >; |
| }; |
| |
| timer@01c20c00 { |
| compatible = "allwinner,sun4i-a10-timer"; |
| reg = <0x01c20c00 0x90>; |
| interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-parent = <&GIC>; |
| clock-frequency = < 24000000 >; |
| }; |
| |
| watchdog@01c20c90 { |
| compatible = "allwinner,sun4i-a10-wdt"; |
| reg = <0x01c20c90 0x10>; |
| }; |
| |
| pio: gpio@01c20800 { |
| #gpio-cells = <3>; |
| compatible = "allwinner,sun7i-a20-pinctrl"; |
| gpio-controller; |
| reg =< 0x01c20800 0x400 >; |
| interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| interrupt-parent = <&GIC>; |
| |
| gmac_pins_mii: gmac_mii@0 { |
| allwinner,pins = "PA0", "PA1", "PA2", |
| "PA3", "PA4", "PA5", "PA6", |
| "PA7", "PA8", "PA9", "PA10", |
| "PA11", "PA12", "PA13", "PA14", |
| "PA15", "PA16"; |
| allwinner,function = "gmac"; |
| allwinner,drive = <SUN4I_PINCTRL_10_MA>; |
| allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
| }; |
| |
| gmac_pins_rgmii: gmac_rgmii@0 { |
| allwinner,pins = "PA0", "PA1", "PA2", |
| "PA3", "PA4", "PA5", "PA6", |
| "PA7", "PA8", "PA10", |
| "PA11", "PA12", "PA13", |
| "PA15", "PA16"; |
| allwinner,function = "gmac"; |
| allwinner,drive = <SUN4I_PINCTRL_40_MA>; |
| allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
| }; |
| |
| }; |
| |
| usb1: usb@01c14000 { |
| compatible = "allwinner,sun7i-a20-ehci", "generic-ehci"; |
| reg = <0x01c14000 0x1000>; |
| interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-parent = <&GIC>; |
| }; |
| |
| usb2: usb@01c1c000 { |
| compatible = "allwinner,sun7i-a20-ehci", "generic-ehci"; |
| reg = <0x01c1c000 0x1000>; |
| interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-parent = <&GIC>; |
| }; |
| |
| mmc0: mmc@01c0f000 { |
| compatible = "allwinner,sun5i-a13-mmc"; |
| reg = <0x01c0f000 0x1000>; |
| interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| sata@01c18000 { |
| compatible = "allwinner,sun4i-a10-ahci"; |
| reg = <0x01c18000 0x1000>; |
| interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-parent = <&GIC>; |
| status = "disabled"; |
| }; |
| |
| UART0: serial@01c28000 { |
| compatible = "snps,dw-apb-uart"; |
| reg = <0x01c28000 0x400>; |
| reg-shift = <2>; |
| interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; |
| current-speed = <115200>; |
| clock-frequency = < 24000000 >; |
| }; |
| |
| emac@01c0b000 { |
| compatible = "allwinner,sun4i-a10-emac"; |
| reg = <0x01c0b000 0x1000>; |
| interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-parent = <&GIC>; |
| status = "disabled"; |
| }; |
| |
| gmac@01c50000 { |
| compatible = "allwinner,sun7i-a20-gmac"; |
| reg = <0x01c50000 0x10000>; |
| interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-parent = <&GIC>; |
| snps,pbl = <2>; |
| snps,fixed-burst; |
| snps,force_sf_dma_mode; |
| status = "disabled"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| dma: dma-controller@01c02000 { |
| compatible = "allwinner,sun4i-a10-dma"; |
| reg = <0x01c02000 0x1000>; |
| interrupts = <27>; |
| interrupt-parent = <&GIC>; |
| }; |
| |
| codec: codec@01c22c00 { |
| compatible = "allwinner,sun7i-a20-codec"; |
| reg = <0x01c22c00 0x40>; |
| interrupts = <30>; |
| interrupt-parent = <&GIC>; |
| status = "disabled"; |
| }; |
| }; |
| }; |
| |