| /* |
| * Copyright (c) 2013 Ian Lepore |
| * Copyright (c) 2012 The FreeBSD Foundation |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * 1. Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * 2. Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| * SUCH DAMAGE. |
| * |
| * Freescale i.MX6 Common Device Tree Source. |
| * There are enough differences between the Solo, Dual, Quad, and *-lite |
| * flavors of this SoC that eventually we will need a finer-grained breakdown |
| * of some of this stuff. For now this file works for all of them. I think. |
| * |
| * $FreeBSD$ |
| */ |
| |
| / { |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| device_type = "cpu"; |
| compatible = "ARM,MCIMX6"; |
| reg = <0x0>; |
| d-cache-line-size = <32>; |
| i-cache-line-size = <32>; |
| d-cache-size = <0x8000>; |
| i-cache-size = <0x8000>; |
| /* TODO: describe L2 cache also */ |
| timebase-frequency = <0>; |
| bus-frequency = <0>; |
| clock-frequency = <0>; |
| }; |
| }; |
| |
| aliases { |
| soc = &SOC; |
| }; |
| |
| SOC: soc@00000000 { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| interrupt-parent = <&gic>; |
| ranges = <0x00000000 0x00000000 0x10000000>; |
| |
| gic: generic-interrupt-controller@00a00100 { |
| compatible = "arm,gic"; |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| reg = <0x00a01000 0x00001000 |
| 0x00a00100 0x00000100>; |
| }; |
| |
| mp_tmr0@00a00200 { |
| compatible = "arm,mpcore-timers"; |
| reg = <0x00a00200 0x100 |
| 0x00a00600 0x100>; |
| interrupts = <27 29>; |
| interrupt-parent = <&gic>; |
| }; |
| |
| l2-cache@00a02000 { |
| compatible = "arm,pl310-cache", "arm,pl310"; |
| reg = <0xa02000 0x1000>; |
| interrupts = <124>; |
| cache-level = <0x2>; |
| interrupt-parent = < &gic >; |
| }; |
| |
| aips@02000000 { /* AIPS1 */ |
| compatible = "fsl,aips-bus", "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| interrupt-parent = <&gic>; |
| reg = <0x02000000 0x00100000>; |
| ranges; |
| |
| /* Required by many devices, so better to stay first */ |
| clks: ccm@020c4000 { |
| compatible = "fsl,imx6q-ccm"; |
| reg = <0x020c4000 0x4000>; |
| interrupts = <119 120>; |
| }; |
| |
| /* System Reset Controller */ |
| src: src@4006E000 { |
| compatible = "fsl,imx6-src"; |
| reg = <0x020D8000 0x100>; |
| }; |
| |
| sdma: sdma@020ec000 { |
| compatible = "fsl,imx6q-sdma"; |
| reg = <0x020ec000 0x4000>; |
| interrupt-parent = <&gic>; |
| interrupts = <34>; |
| status = "disabled"; |
| }; |
| |
| anatop: anatop@020c8000 { |
| compatible = "fsl,imx6q-anatop"; |
| reg = <0x020c8000 0x1000>; |
| interrupt-parent = <&gic>; |
| interrupts = <49>; |
| }; |
| |
| gpt: timer@02098000 { |
| compatible = "fsl,imx6q-gpt", "fsl,imx51-gpt"; |
| reg = <0x02098000 0x4000>; |
| interrupt-parent = <&gic>; |
| interrupts = <87>; |
| }; |
| |
| iomux@020e0000 { |
| compatible = "fsl,imx6q-iomuxc"; |
| reg = <0x020e0000 0x4000>; |
| interrupt-parent = <&gic>; |
| interrupts = <32>; |
| }; |
| |
| gpio1: gpio@0209c000 { |
| compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
| reg = <0x0209c000 0x4000>; |
| interrupts = < 98 99 >; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| status = "disabled"; |
| }; |
| |
| gpio2: gpio@020a0000 { |
| compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
| reg = <0x020a0000 0x4000>; |
| interrupts = < 100 101 >; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| status = "disabled"; |
| }; |
| |
| gpio3: gpio@020a4000 { |
| compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
| reg = <0x020a4000 0x4000>; |
| interrupts = < 102 103 >; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| status = "disabled"; |
| }; |
| |
| gpio4: gpio@020a8000 { |
| compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
| reg = <0x020a8000 0x4000>; |
| interrupts = < 104 105 >; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| status = "disabled"; |
| }; |
| |
| gpio5: gpio@020ac000 { |
| compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
| reg = <0x020ac000 0x4000>; |
| interrupts = < 106 107 >; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| status = "disabled"; |
| }; |
| |
| gpio6: gpio@020b0000 { |
| compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
| reg = <0x020b0000 0x4000>; |
| interrupts = < 108 109 >; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| status = "disabled"; |
| }; |
| |
| gpio7: gpio@020b4000 { |
| compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
| reg = <0x020b4000 0x4000>; |
| interrupts = < 110 111 >; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| status = "disabled"; |
| }; |
| |
| uart1: serial@02020000 { |
| compatible = "fsl,imx6q-uart"; |
| reg = <0x02020000 0x4000>; |
| interrupt-parent = <&gic>; |
| interrupts = <58>; |
| clock-frequency = <80000000>; |
| status = "disabled"; |
| }; |
| |
| uart2: serial@021e8000 { |
| compatible = "fsl,imx6q-uart"; |
| reg = <0x021e8000 0x4000>; |
| interrupt-parent = <&gic>; |
| interrupts = <59>; |
| clock-frequency = <80000000>; |
| status = "disabled"; |
| }; |
| |
| uart3: serial@021ec000 { |
| compatible = "fsl,imx6q-uart"; |
| reg = <0x021ec000 0x4000>; |
| interrupt-parent = <&gic>; |
| interrupts = <60>; |
| clock-frequency = <80000000>; |
| status = "disabled"; |
| }; |
| |
| uart4: serial@021f0000 { |
| compatible = "fsl,imx6q-uart"; |
| reg = <0x021f0000 0x4000>; |
| interrupt-parent = <&gic>; |
| interrupts = <61>; |
| clock-frequency = <80000000>; |
| status = "disabled"; |
| }; |
| |
| uart5: serial@021f4000 { |
| compatible = "fsl,imx6q-uart"; |
| reg = <0x021f4000 0x4000>; |
| interrupt-parent = <&gic>; |
| interrupts = <62>; |
| clock-frequency = <80000000>; |
| status = "disabled"; |
| }; |
| |
| usbphy1: usbphy@020c9000 { |
| compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; |
| reg = <0x020c9000 0x1000>; |
| interrupts = <44>; |
| status = "disabled"; |
| }; |
| |
| usbphy2: usbphy@020ca000 { |
| compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; |
| reg = <0x020ca000 0x1000>; |
| interrupts = <45>; |
| status = "disabled"; |
| }; |
| |
| ecspi1: ecspi@02008000 { |
| compatible = "fsl,imx6q-ecspi"; |
| reg = <0x02008000 0x4000>; |
| interrupts = < 63 >; |
| status = "disabled"; |
| }; |
| |
| ecspi2: ecspi@0200C000 { |
| compatible = "fsl,imx6q-ecspi"; |
| reg = <0x0200C000 0x4000>; |
| interrupts = < 64 >; |
| status = "disabled"; |
| }; |
| |
| ecspi3: ecspi@02010000 { |
| compatible = "fsl,imx6q-ecspi"; |
| reg = <0x02010000 0x4000>; |
| interrupts = < 65 >; |
| status = "disabled"; |
| }; |
| |
| ecspi4: ecspi@02014000 { |
| compatible = "fsl,imx6q-ecspi"; |
| reg = <0x02014000 0x4000>; |
| interrupts = < 66 >; |
| status = "disabled"; |
| }; |
| |
| ecspi5: ecspi@02018000 { |
| compatible = "fsl,imx6q-ecspi"; |
| reg = <0x02018000 0x4000>; |
| interrupts = < 67 >; |
| status = "disabled"; |
| }; |
| |
| ssi1: ssi@02028000 { |
| compatible = "fsl,imx6q-ssi"; |
| reg = <0x02028000 0x4000>; |
| interrupts = < 78 >; |
| dmas = <&sdma 37 1 0>, |
| <&sdma 38 1 0>; |
| dma-names = "rx", "tx"; |
| status = "disabled"; |
| }; |
| |
| ssi2: ssi@0202C000 { |
| compatible = "fsl,imx6q-ssi"; |
| reg = <0x0202C000 0x4000>; |
| interrupts = < 79 >; |
| status = "disabled"; |
| }; |
| |
| ssi3: ssi@02030000 { |
| compatible = "fsl,imx6q-ssi"; |
| reg = <0x02030000 0x4000>; |
| interrupts = < 80 >; |
| status = "disabled"; |
| }; |
| }; |
| |
| aips@02100000 { /* AIPS2 */ |
| compatible = "fsl,aips-bus", "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| interrupt-parent = <&gic>; |
| reg = <0x02100000 0x00100000>; |
| ranges; |
| |
| i2c1: i2c@021a0000 { |
| compatible = "fsl,imx6q-i2c"; |
| reg = <0x021a0000 0x4000>; |
| interrupts = < 68 >; |
| status = "disabled"; |
| }; |
| |
| i2c2: i2c@021a4000 { |
| compatible = "fsl,imx6q-i2c"; |
| reg = <0x021a4000 0x4000>; |
| interrupts = < 69 >; |
| status = "disabled"; |
| }; |
| |
| i2c3: i2c@021ac000 { |
| compatible = "fsl,imx6q-i2c"; |
| reg = <0x021a8000 0x4000>; |
| interrupts = < 70 >; |
| status = "disabled"; |
| }; |
| |
| fec1: ethernet@02188000 { |
| compatible = "fsl,imx6q-fec"; |
| reg = <0x02188000 0x4000>; |
| interrupts = <150 151>; |
| status = "disabled"; |
| }; |
| |
| usbotg1: usb@02184000 { |
| compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| reg = <0x02184000 0x200>; |
| interrupts = <75>; |
| fsl,usbphy = <&usbphy1>; |
| fsl,usbmisc = <&usbmisc 0>; |
| status = "disabled"; |
| }; |
| |
| usbh1: usb@02184200 { |
| compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| reg = <0x02184200 0x200>; |
| interrupts = <72>; |
| fsl,usbphy = <&usbphy2>; |
| fsl,usbmisc = <&usbmisc 1>; |
| status = "disabled"; |
| }; |
| |
| usbh2: usb@02184400 { |
| compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| reg = <0x02184400 0x200>; |
| interrupts = <73>; |
| fsl,usbmisc = <&usbmisc 2>; |
| status = "disabled"; |
| }; |
| |
| usbh3: usb@02184600 { |
| compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| reg = <0x02184600 0x200>; |
| interrupts = <74>; |
| fsl,usbmisc = <&usbmisc 3>; |
| status = "disabled"; |
| }; |
| |
| usbmisc: usbmisc@02184800 { |
| #index-cells = <1>; |
| compatible = "fsl,imx6q-usbmisc"; |
| reg = <0x02184800 0x200>; |
| // Not disabled on purpose. |
| }; |
| |
| usdhc1: usdhc@02190000 { |
| compatible = "fsl,imx6q-usdhc"; |
| reg = <0x02190000 0x4000>; |
| interrupt-parent = <&gic>; |
| interrupts = <54>; |
| cd-gpios = <&gpio1 2 0>; |
| bus-width = <0x4>; |
| status ="disabled"; |
| }; |
| |
| usdhc2: usdhc@02194000 { |
| compatible = "fsl,imx6q-usdhc"; |
| reg = <0x02194000 0x4000>; |
| interrupt-parent = <&gic>; |
| interrupts = <55>; |
| non-removable; |
| bus-width = <0x4>; |
| status ="disabled"; |
| }; |
| |
| usdhc3: usdhc@02198000 { |
| compatible = "fsl,imx6q-usdhc"; |
| reg = <0x02198000 0x4000>; |
| interrupt-parent = <&gic>; |
| interrupts = <56>; |
| cd-gpios = <&gpio3 9 0>; |
| bus-width = <0x4>; |
| status ="disabled"; |
| }; |
| |
| usdhc4: usdhc@0219c000 { |
| compatible = "fsl,imx6q-usdhc"; |
| reg = <0x0219c000 0x4000>; |
| interrupt-parent = <&gic>; |
| interrupts = <57>; |
| bus-width = <0x4>; |
| status ="disabled"; |
| }; |
| |
| ocotp0: ocotp@021bc000 { |
| compatible = "fsl,imx6q-ocotp"; |
| reg = <0x021bc000 0x4000>; |
| }; |
| |
| audmux: audmux@021d8000 { |
| compatible = "fsl,imx6q-audmux"; |
| reg = <0x021d8000 0x4000>; |
| status = "disabled"; |
| }; |
| }; |
| }; |
| }; |